2026-09-24T02:32:31Zhttps://ubir.buffalo.edu/oai/request

oai:ubir.buffalo.edu:10477/799072025-12-01T17:24:40Zcom_10477_77914col_10477_79804

A 2-Step Noise Shaping Time-to-Digital Converter Arcot, Srinivas Sanyal, Arindam Electrical Engineering electrical engineering M.S. In this work, a 2-Step Noise Shaping Time to Digital Converter is designed. This 2-step TDC attempts to combine classical TDC architectures with modem circuit techniques to overcome the limitations inherent to classical architectures. This TDC uses 2 step process with Flash TDC as coarse quantiser and a VCO as fine quantiser. This design aims to explore the improvements that can be brought to TDC designs with oversampling, and noise shaping. The Simulink model of this TDC achieves an SNDR of 53dB with ENOB of 8 bits. The circuits have been design in TSMC 65nm in Cadence Virtuoso and Simulink. **To request an accessible version of the file(s) associated with this item, contact library@buffalo.edu. Please include the item's persistent URL [http://hdl.handle.net/. . .] in your request.** 2019-07-30T15:11:01Z 2019-07-30T15:11:01Z 2019 2019-05-10 11:52:01 Text Thesis http://hdl.handle.net/10477/79907 eng Users of works found in University at Buffalo Institutional Repository (UBIR) are responsible for identifying and contacting the copyright owner for permission to reuse. University at Buffalo Libraries do not manage rights for copyright-protected works and cannot assist with permissions. Copyright retained by author. application/pdf State University of New York at Buffalo