Lowering the processing temperature and expanding the applications of metal induced growth of thin film Silicon for photovoltaics
Mersich, Peter T.
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The metal induced growth (MIG) process was used to produce epitaxial thin films of μc-Si. The first part aimed to lower the processing temperature of MIG in order to lower its associated cost through a decreased thermal budget as well as the potential incorporation of inexpensive substrates. The second part applied these films to heterojunctions with ZnO and evaluated them through modeling and experimentation. Attempts to lower the processing temperature of MIG were initiated by substitution of the catalyst metal with either Al or Cu. Both have the capability of crystallizing Si at much lower temperatures than either Ni or Co, which have been used previously. Using Al, μc-Si was deposited at temperatures as low as 350 °C. At 525 °C, a preferred orientation of (220) Si was observed with additional (111) and (311) Si orientations, while a temperature of 350 °C resulted in a shift in preferred orientation to (111) Si. The lower limit for Al thickness was found to be between 10–20 nm with little crystallization and a smooth surface observed at 10 nm with XRD and SEM, respectively. Electrical measurements on Schottky diodes revealed space-charge limited conduction (SCLC) with an exponential distribution of trap levels due to diffusion of Al atoms into the Si, which was supported by analysis with energy dispersive x-ray spectroscopy (EDS) near the film surface. By depositing a thin layer of Co on top of Al prior to Si deposition, the films exhibited increased crystallinity and a more uniform surface likely due to increased confinement of Al atoms. Electrical measurements demonstrated a shift from SCLC to thermionic emission in resulting Schottky diodes. Using Cu, Si films experienced significant delamination due to a large lattice mismatch of Cu silicide and Si. The Si films exhibited fine grains with preferential orientation of (220) Si. When a thin layer of Co was deposited on the Cu prior to Si deposition, it served to modulate the silicide formation and provided a much better lattice match to Si. The films did not observe any delamination. The grain size increased by nearly 50%, while the feature sizes on the film surface increased significantly. Electrical performance of resulting Schottky photodiodes was also greatly improved. Si films using a Cu layer of 45 nm provided better diodes than those with 90 nm. The best performing photodiode had short-circuit current density ( J sc ) of 3.14 mA/cm 2 , open-circuit voltage ( V oc ) of 188 mV, and fill factor of 37.6%. Temperature-dependent current-voltage revealed more rapid changes in conduction at higher voltage ranges. Raman spectroscopy of Si films with various metal layers showed nearly 100% crystalline fraction in all cases, and weaker crystallization using Co/Al as opposed to Co/Ni or Co/Cu. Thin film ZnO/Si heterojunction solar cells were explored for their potentially low cost application. Modeling using AMPS-1D was performed on various heterostructures. In thin film devices, interface defects of 8.8x10 11 1/cm 2 -eV were shown to significantly reduce fill factor and efficiency, while the addition of an a-Si interlayer diminished these effects and increased spectral response and the value of efficiency. Experimentally, the interlayer was implemented as sequential a-Si/nc-Si layers. This was shown to improve conduction in μc-Si photodiodes and ZnO/p-Si heterojunctions. Upon implementation of the complete thin film heterostructure, a diode behavior was observed despite a high leakage current that negated photo-response. Thin film Si by MIG also has potential for application in thin film transistors or as a substrate for epitaxial thickening by other low-cost, high-rate techniques.