Evaluating CVD-Grown Monolayer MoS2 FETs for Logic and Nonvolatile-Memory Applications
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Transition metal dichalcogenides are a broad family of materials that are easily isolated in monolayer (i.e. two-dimensional, 2D) form. In this thesis we focus on a study of monolayer MoS 2 , a wide-bandgap ( E g = 1.9 eV) direct semiconductor that is synthesized through gas-phase Chemical Vapor Deposition (CVD). The CVD growth yields triangular-shaped monolayer crystals, a few tens of microns in size, which were used to fabricate back-gated field-effect transistors (FETs). The as-fabricated devices exhibited a room-temperature threshold voltage ( V T ) of ~9 V, mobility of ~ 1.7 cm 2 /Vs, and an on-off ratio of ~10 6 . They were additionally shown, for the first time, to exhibit excellent current saturation. Dependent on temperature and biasing conditions, conduction was found to vary from variable range hopping (at low drain bias) to velocity saturation (at high drain and gate biases). The importance of velocity saturation was confirmed by simulations that reproduce the results of experiment using a saturation velocity ( v sat ) similar to prior reports for multilayer MoS 2 FETs. In FETs subjected to in-situ annealing, the threshold voltage was greatly reduced and the conductivity significantly improved. At temperatures above ~400 K, a new form of hysteresis was observed in the transfer curves and could be explained by a model of thermally-assisted charge injection from the gate into its oxide. The hysteresis could in turn support nonvolatile programmable-memory operation. This work therefore confirms the excellent potential of 2D MoS 2 as a channel-replacement material for use in digital logic and on-chip nonvolatile memory.