Scalability of Ferroelectric Tunnel Junctions to Sub-100 nm Dimensions
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The ferroelectric tunnel junction (FTJ) is an emerging low-power device that has potential application as a non-volatile memory and logic element in beyond-CMOS circuits. As a beyond- CMOS device, it is necessary to investigate the device scaling limit of FTJs to sub-50 nm dimensions. In addition to the fabrication of scaled FTJs, the integration challenges and CMOS compatibility of the device needs to be addressed. FTJ device performance including ON/OFF ratio, memory retention time, switching endurance, write /read speed and power dissipation need to be characterized for benchmarking of this emerging device, compared to its charge-based counterparts such as DRAM, NAND/NOR flash, as well as to other emerging memory devices. In this dissertation, a detailed investigation of scaling of BaTiO 3 (BTO) based FTJs was performed, from full-scale integration to electrical characterization. Two types of FTJs with La 0.67 Sr 0.33 MnO 3 (LSMO) and SrRuO 3 (SRO) bottom electrodes were investigated in this work namely; Co/BTO/LSMO and Co/BTO/SRO. A CMOS compatible fabrication process for integration of Co/BTO/LSMO FTJ devices (~3×3 µm 2 ) was demonstrated for the first time using standard photolithography and self-aligned RIE technique. The fabricated FTJ device showed switching behavior, however, degradation of the LSMO contact was observed during the fabrication process. A detailed investigation of the contact properties of bottom electrode materials (LSMO, SRO) for BTO-based FTJs was performed. The process and thermal stability of different contact overlayers (Ti, Pt) was explained to understand the nature of the ohmic contacts for metal to SRO and LSMO layers. Noble metals-to-SRO was found to form the most stable contacts for FTJs. Based on this study, a systematic scalability study of Co/BTO/SRO FTJs was carried out from micron (~3×3 µm 2 ) to submicron (~200×200 nm 2 ) dimensions. Positive UP Negative Down (PUND) measurement confirms the ferroelectric properties of the BTO films. A fully integrated FTJ device (~300×300 nm 2 ) was demonstrated with large ON/OFF ratio (~200), large ON current densities (~75A/cm 2 ) and long data retention (>12 h). The device tunneling current was modeled using the known band parameters, with no fitting constants, and in excellent agreement with experimental measurement. A new fabrication process using hydrogen silsesquioxane (HSQ) planarization was developed for the integration of sub-100 nm FTJs. A fully integrated ~75×75 nm 2 FTJ device with composite structures Ti/SrTiO 3 /BaTiO 3 /SrRuO 3 was fabricated and tested. These FTJs have large ON current densities (10 3 A/cm 2 ), which shows a lot of promise for implementation of high-density BaTiO 3 based FTJ devices in future integrated circuits.