DESIGN OF SECOND ORDER, LOW POWER DELTA SIGMA MODULATOR USING INVERTER BASED DIFFERENTIAL AMPLIFIER
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Analog to Digital Converter (ADC) is a circuit used to convert the analog signals to digital or binary form consisting of 1s and 0s. Delta Sigma ADCs are based on two main concepts, oversampling and noise shaping. Conventional high order delta sigma modulators use multi op-amps and thus consume a large power. The focus of our work is to design a higher order ADC using a smaller number of amplifiers to reduce the power consumption; hence the proposed design has a passive integrator and an inverter based differential amplifier. We achieved an SNDR of 43.31 dB and a power consumption of 2.908 uW through our work.