LDPC Codes using Bit Flipping Algorithm to increase the Reliability of a PUF
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In this thesis, error correction codes are used to increase the reliability of a Physically Unclonable Function (PUF) by reducing the Bit Error Rate (BER). Initially BCH codes are studied and implemented and their BER reduction seems to be 8.5%. Further LDPC codes are investigated and a class of them are implemented. Bit flipping decoding algorithm is implemented for decoding of these codes. This is a hard decision algorithm and is shown to be preferable when used for error correction of a PUF. Certain modifications are made to this algorithm to suit the output data set of a voltage divider array PUF. This error correction is realized for outputs of this PUF taken across varying environmental conditions and the average bit error rate reduction is seen to be 11%. LDPC codes are hence proved to be better than BCH codes. This implementation is also compared to other similar works and seems to produce equivalent results while being mathematically simpler to implement.